Silicon Labs /EFR32MG21B020F768IM32 /MODEM_S /DSACTRL

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Interpret as DSACTRL

31282724232019161512118743000000000000000000000000000000000000000000 (DISABLED)DSAMODE0ARRTHD0ARRTOLERTHD00ARRTOLERTHD10 (TS2)SCHPRD0 (AVG2TS)FREQAVGSYM0 (TRANRSTDSA)TRANRSTDSA0 (DSARSTON)DSARSTON0GAINREDUCDLY0LOWDUTY0 (RESTORE)RESTORE0 (AGCBAUDEN)AGCBAUDEN0AMPJUPTHD

SCHPRD=TS2, FREQAVGSYM=AVG2TS, DSAMODE=DISABLED

Description

No Description

Fields

DSAMODE

Mode of Digital Signal Arrival detector

0 (DISABLED): DSA is disabled

1 (ENABLED): DSA is enabled by the relative/absolute RSSI detector and is reset by using detectors for spike content and frequency deviation. The RSSI jump detector is used to recover from false detects.

ARRTHD

Signal arrival valid counter threshold

ARRTOLERTHD0

Arrival tolerance threshold 0

ARRTOLERTHD1

Arrival tolerance threshold 1

SCHPRD

Search period window length

0 (TS2): The search period is 2 symbol periods.

1 (TS4): The search period is 4 symbol periods.

FREQAVGSYM

DSA frequency estimation averaging

0 (AVG2TS): Frequency estimation over 2 symbol periods.

1 (AVG4TS): Frequency estimation over 4 symbol periods.

TRANRSTDSA

power transient detector Reset DSA

DSARSTON

DSA detection reset

GAINREDUCDLY

Detection Delay of AGC gain reduction

LOWDUTY

Low duty cycle delay

RESTORE

Power detector reset of DSA

AGCBAUDEN

Consider Baud_en from AGC

AMPJUPTHD

Amplitude jump detection thrshold

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